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So what does this have to do with current CPUs? When the new Intel Coppermine CPUs were announced, I was pleasantly surprised to see that they feature 256K of on-chip, full-speed cache. Intel has taken the best of the Celeron integrated design, doubled the cache size and incorporated it into a powerful .18 micron Pentium III core. This is the next logical progression in the product line and Intel has cut a perfect swath between the designs of the Celeron and Slot 1 Pentium II/III. As with Socket 7 motherboards of yore, integrated CPU L2 cache is a very expensive proposition. Implementing too large an L2 cache might mean slightly higher performance, but at the expense of affordability. Apparently, Intel has determined that 256K of integrated L2 CPU cache represents the best price/performance ratio for their next-generation Coppermine processors.

The Coppermine features a 256-bit data bus for the on-chip Advanced Transfer Cache, four times the size of the 64-bit bus on both the Katmai Pentium III and Celeron processors. This 256K of L2 cache follows the Celeron lead and runs at the full core frequency of the CPU, thereby scaling correspondingly to any increase to the front-side bus (FSB). The Coppermine's L2 cache also improves in a few other areas, such an 8-way set associativity, reduced latency interface to the cache and support for Advanced System Buffering. The Advanced System Buffering is actually a physical change between the Coppermine and Katmai Pentium III processors and increases the design to six fill buffers (from four), four write-back entries (from one) and eight bus queue buffers (from four). All of these enhancements help to increase the Coppermine's overall cache performance. It also helps cache performance scale to increases in the core frequency, and FSB advancements from 100 to 133 MHz. Intel has designed the Coppermine processor around a Dual Independent Bus (DIB) architecture, featuring a separate dedicated bus for both external CPU transfers and internal cache data transfers.

Here are a few diagrams that detail the differences between the Pentium III FC-PGA processor cache and that of the earlier Pentium III Katmai.







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